Product Summary
The CY7C1470BV33-200BZXI is a ynchronous pipelined burst SRAMwith No Bus Latency logic, respectively. The CY7C1470BV33-200BZXI is designed to support unlimited true back-to-back read or write operations with no wait states. The CY7C1470BV33-200BZXI is equipped with the advanced (NoBL) logic required to enable consecutive read or write operations with data being transferred on every clock cycle.
Parametrics
CY7C1470BV33-200BZXI absolute maximum ratings: (1) Storage Temperature: -65 to +150°C; (2) Ambient Temperature with Power Temperature with power supplied: -55 to +125°C; (3) Supply Voltage on VDD Relative to GND: -0.5 to +4.6V; (4) Supply Voltage on VDDQ Relative to GND: -0.5 to +VDD; (5) DC to Outputs in Tri-State: -0.5 to VDDQ +0.5V; (6) DC Input Voltage: -0.5 to VDD +0.5V; (7) DC Input Voltage (LOW) : 20mA; (8) Static Discharge Voltage: > 2001V; (9) Latch Up Current: > 200mA.
Features
CY7C1470BV33-200BZXI features: (1) Pin-compatible and functionally equivalent to ZBT; (2) Supports 250 MHz bus operations with zero wait states; (3) Internally self-timed output buffer control to eliminate the need to use a synchronous OE; (4) Fully registered (inputs and outputs) for pipelined operation; (5) Byte Write capability; (6) Synchronous self-timed writes; (7) IEEE 1149.1 JTAG Boundary Scan compatible; (8) Burst capability!alinear or interleaved burst order.
Diagrams
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Image | Part No | Mfg | Description | Pricing (USD) |
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CY7C1470BV33-200BZXI |
Cypress Semiconductor |
SRAM 2Mx36 3.3V NoBL PL SRAM |
Data Sheet |
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